NVME Overheated

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tommi2day
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NVME Overheated

Post by tommi2day »

I plugged 2x2TB Crucial P5 plus NVME SSDs into the NVME slots and started to build a new pool as traid(mirror). While running this i got overheating warnings at 66C/150F from one SSD. Both SSD have a ICYBox M2.SSD fanless heatsink. I also noticed even with nvme ssd the raid sync is very slow (~ 10%/h).

Is this a problem with the ssd and i should return or usual behavior? Can i adjust the warning levels for these drives?

Thomas
main: T9-450
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crisisacting
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Re: NVME Overheated

Post by crisisacting »

The NVMe slots are likely only connected @ PCIe ×1, so their maximum bandwidth is just under 1 GBps; using high throughput NVMe SSDs are a complete waste on these low power purpose-built devices.
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TMroy
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Re: NVME Overheated

Post by TMroy »

The threshold of SSD temperature alarm is preset to 70 degrees. When the SSD continues to have a high workload, the temperature will be high. If you want to reduce the temperature of your SSD, we recommend you to install a heat sink on your SSD.
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tommi2day
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Re: NVME Overheated

Post by tommi2day »

crisisacting wrote: 27 May 2023, 06:32 The NVMe slots are likely only connected @ PCIe ×1, so their maximum bandwidth is just under 1 GBps; using high throughput NVMe SSDs are a complete waste on these low power purpose-built devices.
Ups, i was not aware about this, i never expected to get NVME drives dropped to 1GBbs. This is ridiclous, the CPU should have enough lanes and even the already limited USB Ports with 5GB are faster
main: T9-450
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tommi2day
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Re: NVME Overheated

Post by tommi2day »

TMroy wrote: 27 May 2023, 12:02 The threshold of SSD temperature alarm is preset to 70 degrees. When the SSD continues to have a high workload, the temperature will be high. If you want to reduce the temperature of your SSD, we recommend you to install a heat sink on your SSD.
As i mentioned, i have alredy a fanless headsink placed on the SSD. I found in the specs, the drives will be speed limited starting at 85C. Maybe it would be a good Idea to make the threshold configurable. And add a fan to pullout all the heat of the board site at all for this class of device

Thomas
main: T9-450
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crisisacting
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Re: NVME Overheated

Post by crisisacting »

tommi2day wrote: 27 May 2023, 16:11 … This is ridiculous, the CPU should have enough lanes and even the already limited USB Ports with 5GB are faster
The Atom SoC on the T9-450 definitely has the PCIe lanes (@ 20) to support more bandwidth to the NVMe slots, however USB 3.2 Gen1 is 5 gigabits per second, which translates to ~500 MegaBytes per second, so it actually has half the throughput versus a PCIe Gen3 ×1 connection.
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Sparker
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Re: NVME Overheated

Post by Sparker »

crisisacting wrote: 27 May 2023, 06:32 The NVMe slots are likely only connected @ PCIe ×1, so their maximum bandwidth is just under 1 GBps; using high throughput NVMe SSDs are a complete waste on these low power purpose-built devices.
The SATA connectors for the HDDs are connected with a PCIe x4 slot so I would be surprised if the NVMe slots are just x1.
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crisisacting
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Re: NVME Overheated

Post by crisisacting »

{L_BUTTON_AT}Sparker
SSH onto your device & login as the root/superuser, first run

Code: Select all

lspci | grep SSD
should help to find your drive(s) ID and then run

Code: Select all

lspci -vvv -s 00:00.0
The command likely may require sudo before it & replace 00:00.0 with your drive(s)' ID
This should output the everything regarding that drive; look for LnkCap to verify the drive(s)' capabilities and then LnkSta to locate the actual connection speed & Width under that will be the PCIe multiplier. The SoC in the commerical T9-450 is capable of supporting more lanes to each NVMe, however that doesn't necessarily mean it's wired that way; on the consumer 223 & 423 series devices, the SoC (either N5095 & N5105) has even less PCIe lanes (just 8), so it wouldn't make fiscal sense to wire them to use more than what the SoC is capable of supporting when other devices require connections (like each network chipset).
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tommi2day
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Re: NVME Overheated

Post by tommi2day »

Hm, for my crucial p5 looks like Cap 4x, used 2x
lspci -vvvv -d c0a9:5407
02:00.0 Class 0108: Device c0a9:5407 (prog-if 02)
Subsystem: Device c0a9:0100
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
NUMA node: 0
Region 0: Memory at dfc00000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI-X: Enable+ Count=32 Masked-
Vector table: BAR=0 offset=00003000
PBA: BAR=0 offset=00002000
Capabilities: [60] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
MaxPayload 256 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 16GT/s, Width x4, ASPM L1, Exit Latency L1 <8us
ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 8GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR+, OBFF Via message
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 17s to 64s, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+
EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [2a0 v1] #19
Capabilities: [2d0 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Capabilities: [320 v1] #25
Capabilities: [330 v1] #26
Capabilities: [360 v1] #27
Capabilities: [700 v1] L1 PM Substates
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1- L1_PM_Substates+
PortCommonModeRestoreTime=32us PortTPowerOnTime=20us
L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
T_CommonMode=0us LTR1.2_Threshold=65536ns
L1SubCtl2: T_PwrOn=20us
Kernel driver in use: nvme
main: T9-450
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crisisacting
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Re: NVME Overheated

Post by crisisacting »

{L_BUTTON_AT}tommi2day

At least it's better than just ×1.
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